A peripheral board controller for digital exchange systems

1 January 1983

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXVI, 76-77
https://doi.org/10.1109/isscc.1983.1156439

Abstract

This report will cover a controller which optimizes line board architecture in digital exchange systems. A μP compatible circuit implements a 4Mb serial communication link and includes HDLC protocol, variable time slot assignment for up to 16 subscribers, and a redundant PCM interface port. The circuit is realized in a 3.5μm NMOS process.

Keywords

DIGITAL CONTROL
CONTROL SYSTEMS
MICROPROCESSORS
LOGIC TESTING
WIRING
CIRCUITS
CENTRALIZED CONTROL
LOGIC DEVICES
FILTERS
TELEPHONY

This publication has 1 reference indexed in Scilit:

Communications: LSI helps telephones go digital: Low-cost, high-density chips accelerate the digital design of switching systems, terminals, and networks
IEEE Spectrum, 1980