A Novel LOCal Oxidation of Silicon (LOCOS)-Type Isolation Technology Free of the Field Oxide Thinning Effect

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Abstract
A novel LOCal Oxidation of Silicon (LOCOS)-type isolation technology free of the field oxide thinning effect, named POlysilicon (poly-Si) Spacer LOCOS (POS-LOCOS), has been developed. After the first field oxidation, poly-Si is deposited and etched anisotropically. Then, at the narrow field region, substantial amount of poly-Si remains after etching, while only spacers are formed at the ends of the field region for the wide region, and then the second oxidation is performed by oxidizing poly-Si. POS-LOCOS eliminates the field oxide thinning effect. Devices with POS-LOCOS show less variation in the isolation size, lower peripheral junction leakage current, and higher field transistor threshold voltages at narrow isolation region compared to the conventional LOCOS isolation. Almost the same N+/N+ punchthrough characteristics are obtained with POS-LOCOS and conventional LOCOS, and transistors with POS-LOCOS show low leakage current and normal drain current (I d)-gate voltage (V g) characteristic. It is expected that POS-LOCOS will help extend the lifetime of the LOCOS-type isolation to the next generation of the integrated circuit (IC) technology.

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