Design of hardware algorithms by recurrence relations

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Abstract
With the progress in VLSI technology, a remarkable attempt, called the hardware algorithm, to realize various kinds of algorithms directly as hardware on VLSI chip has become practical. No significant result, however, has been observed on the systematic formulation of the hardware algorithm or its design method. This paper proposes a new design method for the hardware algorithm using recurrence relations. As the first step, a class C of problems is introduced which is defined by the recurrence relations with two variables. Several practically important problems such as string matching, are contained in this class. It is shown that letting the size of the problem be m, one can always construct a hardware algorithm of 0(m) steps to solve any problem in the class C. Then by imposing a certain restriction on the recurrence relation, a subclass C1 of the class C is defined. It is shown that the hardware algorithm of 0 (log m + m/log m) steps can be constructed for the subclass C1. Finally, the extension of the class C is discussed, and it is shown that its algorithm can be applied, with some modifications, to a class of recurrence relations which is wider than the class C.

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