Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs
- 1 January 1996
- journal article
- Published by Springer Nature in Journal of Signal Processing Systems
- Vol. 12 (1) , 67-86
- https://doi.org/10.1007/bf00936947
Abstract
No abstract availableKeywords
This publication has 19 references indexed in Scilit:
- A stochastic neural architecture that exploits dynamically reconfigurable FPGAsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- WASMII: a data driven computer on a virtual hardwarePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Text searching on Splash 2Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- PRISM-II compiler and architecturePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Spyder: a reconfigurable VLIW processor using FPGAsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Searching genetic databases on Splash 2Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Programmable active memories: a performance assessmentPublished by Springer Nature ,1993
- Splash 2Published by Association for Computing Machinery (ACM) ,1992
- GANGLION-a fast field-programmable gate array implementation of a connectionist classifierIEEE Journal of Solid-State Circuits, 1992
- Introduction to FPGAsPublished by Springer Nature ,1992