Fabrication of n + ledge channel structure for GaAs FETs with a single lithography step
- 10 October 1985
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 21 (21) , 955-957
- https://doi.org/10.1049/el:19850675
Abstract
A self-aligned process has been developed using multiple resist layers to fabricate the n+ ledge channel structure on GaAs FETs with a single lithography step. The new process eliminates one critical alignment step and has greater flexibility for the control of channel parameters. Power FET performance is comparable to that of conventionally produced devices.Keywords
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