SCHALLOC: an algorithm for simultaneous scheduling & connectivity binding in a datapath synthesis system
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 11 references indexed in Scilit:
- Automatic synthesis of a multi-bus architecture for DSPPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Splicer: a heuristic approach to connectivity bindingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Knowledge based control in micro-architecture designPublished by Association for Computing Machinery (ACM) ,1987
- MAHA: A Program for Datapath SynthesisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- HAL: A Multi-Paradigm Approach to Automatic Data Path SynthesisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- Flow graph representationPublished by Association for Computing Machinery (ACM) ,1986
- Automatic Data Path SynthesisComputer, 1983
- The VLSI Design Automation Assistant: Prototype SystemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- Local Microcode Compaction TechniquesACM Computing Surveys, 1980
- A Formal Basis for the Heuristic Determination of Minimum Cost PathsIEEE Transactions on Systems Science and Cybernetics, 1968