0.1 ?m RFCMOS on high resistivity substrates for system on chip (SOC) applications
- 26 June 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper describes the impact of substrate resistivity on the key components of the radio frequency (RF) CMOS for the system on chip (SOC) applications. The comparison includes the transistor, inductor, capacitor, noise isolation, latch-up as well as the well-to-well isolation in a 0.1 /spl mu/m (physical gate length) CMOS technology.Keywords
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