A 34GHz/1V prescaler in 90nm CMOS SOI
- 10 December 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper presents a Ka band prescaler in a general-purpose 90nm SOI CMOS process (CMOS090/spl I.bar/SOI). Hereby, a D-latch concept is introduced. A stack inductor enhances its high frequency performance and reduces the sensitivity with process variations and temperature. The prescaler version with stack inductor has the minimum sensitivity at 31 GHz with an operation range of 13 to 34GHz. The prescaler without inductors has an operation range of 9 to 27GHz with minimum sensitivity at 23GHz. At 1MHz offset from the carrier, the phase noise of the divider amounts -127dBc/Hz. For on-wafer testing, the two versions of the prescaler were implemented in a 90nm SOI CMOS process (CMOS090/spl I.bar/SOI) with six metal layers and one thick top metal layer. The divider consumes 60mW from a 1V supply voltage and the active area is 350 /spl times/ 400/spl mu/m/sup 2/.Keywords
This publication has 3 references indexed in Scilit:
- A wide-band CMOS injection-locked frequency dividerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- A power-efficient 33 GHz 2:1 static frequency divider in 0.12-μm SOI CMOSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Application of an SOI 0.12-µm CMOS technology to SoCs with low-power and high-frequency circuitsIBM Journal of Research and Development, 2003