A substrate etch geometry for near ideal breakdown voltage in p-n junction devices
- 1 August 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 24 (8) , 1077-1081
- https://doi.org/10.1109/T-ED.1977.18879
Abstract
A new junction-termination geometry is proposed which can be achieved by a simple etch. This etch effectively lowers peak surface fields in both plane and planar p-n junction devices without increasing peak bulk electric fields. This insures an ideal, or near-ideal, avalanche breakdown voltage. The further advantages of the proposed technique lie in a relative insensitivity to etch depth, a minimal loss in device area, and compatibility with planar technology. Theoretical and experimental results are given to illustrate the substrate-etch technique.Keywords
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