Influence Of Substrate Off-Cut On The Defect Structure In Relaxed Graded Si-Ge/Si Layers

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Abstract
Relaxed graded Si-Ge/Si layers can be used in a variety of micro-electronics applications such as templates for III-V/Si integration, in high speed field effect transistor (FET) structures and as detectors in optical communication. Each of these applications requires a different final Ge concentration in the graded Si-Ge layer. With increasing Ge content in the graded layer, some of the materials concerns that need to be addressed are- (i) a high surface roughness, (ii) the formation of dislocation pile-ups, and (iii) an increase in the threading dislocation density. We have shown that there is a substantial improvement in the surface roughness and the dislocation pile-up density of the graded Si-Ge layers by depositing on (001) 6° off-cut substrates. The substrate miscut also facilitates favorable intersections of {111} planes that aid reactions between the 60° dislocations to form edge dislocations with Burgers vectors of the type 1/2 and resulting in a novel hexagonal dislocation structure. Such reactions occurred more readily in the Ge-rich regions of the graded layers where the growth temperature was high enough to aid dislocation climb. The edge dislocations with in-plane Burgers vectors lack a tilt component and the decreased rate of tilting in the Ge-rich regions is confirmed by triple crystal X-ray reciprocal space maps. This novel dislocation structure offers opportunities to explore new processes which may eliminate spatially variant strain fields in relaxed epitaxial layers.