Transputer implementation of Kalman filters

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Abstract
The paper is concerned with transputer implementations of three forms of the Kalman filter algorithm. Two approaches to a concurrent realisation are considered, involving heuristic partitioning of the conventional sequential algorithm and proposing a new strategy for mapping the systolic array descriptions onto parallel processors. Real-time implementation results on transputer networks are presented and the relative performances evaluated in terms of speed, parallel processing efficiency and numerical accuracy for a test system. This attempts not only to quantify the performances of parallel Kalman filters but also to address the more general issues involved in mapping algorithms onto architectures.