An FPGA-Based Real-Time Hardware Accelerator for Orientation Calculation Part in SIFT
- 1 September 2009
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1334-1337
- https://doi.org/10.1109/iih-msp.2009.64
Abstract
SIFT is regarded as one of the most powerful feature point detection algorithms in the world. The Orientation Calculation Part, defining major orientation of feature points, enables selected image features to be invariant to rotation changes. In this paper, we propose an FPGA-implementable hardware accelerator for this part. By introducing LUT-Based Square Root Computation and Shifting-Based Orientation Calculation with use of dual-port DDR2 memory access, we achieve to reach real-time process speed, meanwhile keeping high accuracy. By experiment, our system proves to reach Max Clock Frequency of 130.0 MHz, processing up to around 256,000 feature points including memory operations. Compared with conventional work, hardware cost is remained at the same level. Accuracy is kept at 98.9% for over 40,000 feature points from 50 images. Our proposal is suitable for a real-time SIFT system.Keywords
This publication has 3 references indexed in Scilit:
- A Parallel Hardware Architecture for Scale and Rotation Invariant Feature DetectionIEEE Transactions on Circuits and Systems for Video Technology, 2008
- Distinctive Image Features from Scale-Invariant KeypointsInternational Journal of Computer Vision, 2004
- Object recognition from local scale-invariant featuresPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1999