Circuit design techniques for a gigahertz integer microprocessor
- 27 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 10636404,p. 11-16
- https://doi.org/10.1109/iccd.1998.727017
Abstract
Using highly optimized, custom circuits and fast dynamic array control structures, a small team of designers at the IBM Austin Research Laboratory has developed a one gigahertz microprocessor. This paper describes the custom datapath circuit technology employed in this design. Particular attention was paid in the design process to the trade-off between performance and noise-margins. To achieve the low circuit latencies, highly-optimized and noise-characterized delayed-reset domino circuits were employed in the datapath elements of the gigahertz design.Keywords
This publication has 2 references indexed in Scilit:
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- A 1.0 GHz single-issue 64 b powerPC integer processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002