A 120kHz sigma/delta A/D converter

1 January 1986

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXIX, 138-139
https://doi.org/10.1109/isscc.1986.1156997

Abstract

This paper will cover a sigma/delta A/D converter employing two integrators. The converter achieves lib linearity and resolution with 15MHz clock for a 120kHz baseband Signal. A single 5V supply and 15MHz amplifiers are used. The intended application is for an ISDN echo canceler.

Keywords

BANDWIDTH
VOLTAGE
SWITCHES
PARASITIC CAPACITANCE
CLOCKS
SIGNAL RESOLUTION
CIRCUITS
BASEBAND
FILTERS
COMMUNICATION SYSTEM CONTROL

This publication has 2 references indexed in Scilit:

A Use of Double Integration in Sigma Delta Modulation
IEEE Transactions on Communications, 1985
MOS ADC-filter combination that does not require precision analog components
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1985