MOS Hardening Approaches for Low-Temperature Applications
- 1 December 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 24 (6) , 2140-2146
- https://doi.org/10.1109/tns.1977.4329180
Abstract
Charge buildup in irradiated MOS devices is significantly more severe at low temperatures than at room temperature. Approaches for counteracting this problem are considered in this paper, including: (1) careful selection of the applied field; (2) ion implantation of the oxide; (3) use of a thin oxide. Experimental and analytical results are presented and it is demonstrated that the applied field dependence of flatband voltage shift in MOS capacitors irradiated at 77°K can be accounted for in terms of the field dependence of electron yield and the transport of holes at high fields. Analysis of ion implantation effects indicates that a significant improvement in radiation tolerance should be achievable by this method. A simultaneous consideration of the effects of oxide thickness and applied field on charge buildup in an unimplanted oxide suggests that reducing the thickness to ≼500 A° will largely eliminate low temperature problems in a steady-state ionizing radiation environment as long as the applied voltage is ≽ 10V.Keywords
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