Program path analysis to bound cache-related preemption delay in preemptive real-time systems
- 1 May 2000
- proceedings article
- Published by Association for Computing Machinery (ACM)
Abstract
No abstract availableThis publication has 7 references indexed in Scilit:
- Performance estimation of embedded software with instruction cache modelingACM Transactions on Design Automation of Electronic Systems, 1999
- Efficient and Precise Cache Behavior Prediction for Real-Time SystemsReal-Time Systems, 1999
- Analysis of cache-related preemption delay in fixed-priority preemptive schedulingIEEE Transactions on Computers, 1998
- Performance analysis of embedded software using implicit path enumerationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1997
- 1995 high level synthesis design repositoryPublished by Association for Computing Machinery (ACM) ,1995
- Bounding worst-case instruction cache performancePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1994
- Calculating the maximum execution time of real-time programsReal-Time Systems, 1989