Raised source/drain MOSFET with dual sidewall spacers
- 1 March 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 12 (3) , 89-91
- https://doi.org/10.1109/55.75721
Abstract
A raised source/drain (S/D) MOSFET with sidewall spacers formed both before and after selective epitaxial silicon deposition in S/D regions is discussed. The second spacer overlies any faceted regions of the epitaxial silicon near the gate edge and has advantages for MOSFETs with implant-doped or in-situ doped epitaxial silicon regions. In particular, the spacer can prevent S/D dopants from being implanted through any thinner faceted regions near the gate edge, which would otherwise result in a deeper than desired junction depth in the silicon substrate. Additionally, the spacer can prevent source-to-substrate salicide shorts through the thinner faceted regions.Keywords
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