Novel fabrication process for Si 2 N 4 passivated InAlAs/UnGaAs/InP HFETS
- 10 September 1992
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 28 (19) , 1849-1850
- https://doi.org/10.1049/el:19921179
Abstract
The process technology of fully passivated T-shaped 0.18 μm gate length InAlAs/GaAs/InP HFETs is described. Using material selective etchants, devices realised with this process yielded gate breakdown voltages in excess of 8 V and drain source breakdown voltages in excess of 8 V and drain source breakdown voltages in excess of 5 V. The excellent gate characteristics lead to a noise figure of 0.75 dB at 18 GHz with 13dB associated gain. The extrapolated maximum frequency of osciallation was determined to be fmax = 290 GHzKeywords
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