Below 10 ps/gate operation with buried p -layer SAINT FETs
- 6 December 1984
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 20 (25-26) , 1029-1031
- https://doi.org/10.1049/el:19840703
Abstract
GaAs SAINT FETs with a p-layer buried under the active layer have achieved below 10 ps/gate (9.9 ps/gate) operation for the first time in semiconductor devices. The p-layer formed by Be+ implantation is completely depleted by the built-in potential. It has successfully alleviated the short channel effects without increasing parastic capacitance.Keywords
This publication has 1 reference indexed in Scilit:
- EB-Writing n+self-aligned GaAs MESFETs for high-speed LSIsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982