A 20ns CMOS functionable gate array with a configurable memory
- 1 January 1983
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A CMOS gate array with 4,368 gates and 2,304 bits of configurable memory, using 1.5μm design rules, will be discussed. The memory can change word × bit configuration as well as to increase the gate array function.Keywords
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