Abstract
We correlated the offstate current in polycrystalline silicon (polysilicon) thin film transistor (TFT) with the peak electric field in the channel of the device. We investigated p‐channel TFTs with different gate oxide thicknesses, at varying gate and drain biases. The electric fields in the channel of the devices under these experimental conditions were calculated using both process and device simulators, and the experimental offstate current was plotted against simulated fields. We found that in a wide range of electric fields the current exhibits a nearly exponential behavior. Different combinations of the drain and gate biases produce nearly the same offstate current, provided the calculated peak field is the same; moreover, curves corresponding to different gate oxide thicknesses overlay each other. Our results are compatible with the model of the offstate current as being due to the field emission at grain boundaries.