Systematic designs of buffers in macropipelines of systolic arrays
- 1 February 1988
- journal article
- Published by Elsevier in Journal of Parallel and Distributed Computing
- Vol. 5 (1) , 1-25
- https://doi.org/10.1016/0743-7315(88)90030-5
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- A Systolic Signal Processor for Signal-Processing ApplicationsComputer, 1987
- VLSI architectures for feature extraction and pattern classificationComputer Vision, Graphics, and Image Processing, 1983
- PUMPS Architecture for Pattern Analysis and Image Database ManagementIEEE Transactions on Computers, 1982
- Why systolic architectures?Computer, 1982