Design and implementation of the POWER5™ microprocessor

7 June 2004

conference paper
Published by Association for Computing Machinery (ACM)

p. 670-672
https://doi.org/10.1145/996566.996749

Abstract

POWER5 offers significantly increased performance over previous POWER designs by incorporating simultaneous multithreading, an enhanced memory subsystem, and extensive RAS and power management support. The 276M transistor processor is implemented in 130nm silicon-on-insulator technology with 8-level of Cu metallization and operates at 1.5 GHz.

Keywords

POWER5
CLOCK GATING
MICROPROCESSOR DESIGN
POWER REDUCTION
SIMULTANEOUS MULTI-THREADING (SMT)
TEMPERATURE SENSOR

This publication has 1 reference indexed in Scilit:

A clock distribution network for microprocessors
IEEE Journal of Solid-State Circuits, 2001