An efficient VLSI adder for DSP architectures based on RNS
- 23 March 2005
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 10, 1457-1460
- https://doi.org/10.1109/icassp.1985.1168141
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- Models for VLSI implementation of residue number system arithmetic modulesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- Residue Number Scaling and Other Operations Using ROM ArraysIEEE Transactions on Computers, 1978
- A high-speed low-cost recursive digital filter using residue number arithmeticProceedings of the IEEE, 1977
- The use of residue number systems in the design of finite impulse response digital filtersIEEE Transactions on Circuits and Systems, 1977
- A Novel Implementation Method for Addition and Subtraction in Residue Number SystemsIEEE Transactions on Computers, 1974