BiCMOS gate performance optimization using a unified delay model

Publisher Website

1 January 1990

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/vlsit.1990.111023

Abstract

No abstract available

Keywords

This publication has 1 reference indexed in Scilit:

Analysis and characterization of BiCMOS for high-speed digital logic
IEEE Journal of Solid-State Circuits, 1988