A one megabit SRAM fabricated with 1.2 mu technology
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A monolithic 1-Mb static random-access memory (SRAM) with a typical access time of 55 ns, fabricated using 1.2- mu m CMOS technology, is described. The product incorporates a design approach that permits the manufacture of next-generation products (0.8- mu m 1-Mb SRAMs) on current, well-understood production processes. The yield history using this technique supports wafer-level repetitive structures such as memory, or processor/memory combinations. Supporting actual yield data are presented. The product is constructed of many small memories that are fabricated through metal 1, then tested and laser repaired and subsequently interconnected, using a nondiscretionary metal 2 layer, into a much larger memory system.<>Keywords
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