ATPG based on a novel grid-addressable latch element

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Abstract
The CrossCheck grid of sense and probe lines provides a convenient mechanism for addressing a large number of nodes in the circuit. This testpoint grid was previously used to observe internal nodes in the circuit. In this paper we describe a technique that makes use of the same grid to also selectively inject signals into storage elements. The technique is based on a novel design of a grid-addressable latch element, called Cross-controlled Latch (CCL), which allows all flip-flops in the circuit to be deterministically controlled. The combination of massive observability provided by the Crosscheck test matrix and controllability completely solves the static ASIC functional test problem. In addhion to the basic technique, we will discuss its area and performance impact. We present results on two real designs, as well as on several pathological cases which are known to be difficult to test.

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