Design of a 16384-bit serial charge-coupled memory device
- 1 February 1976
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 11 (1) , 10-18
- https://doi.org/10.1109/jssc.1976.1050669
Abstract
No abstract availableKeywords
This publication has 9 references indexed in Scilit:
- A 4160-bit C4D serial memoryIEEE Journal of Solid-State Circuits, 1974
- Charge transfer in overlapping gate charge-coupled devicesIEEE Journal of Solid-State Circuits, 1973
- Performance of Very High Density Charge Coupled DevicesIBM Journal of Research and Development, 1973
- 4096-Bit charge coupled device serial memory arrayPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1973
- CCD memory optionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1973
- The Buried Channel Charge Coupled DeviceBell System Technical Journal, 1972
- Fabrication and Performance Considerations of Charge-Transfer Dynamic Shift RegistersBell System Technical Journal, 1972
- Conceptual design of an eight megabyte high performance charge-coupled storage devicePublished by Association for Computing Machinery (ACM) ,1972
- Charge-coupled digital circuitsIEEE Journal of Solid-State Circuits, 1971