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High-speed divider using GaAs ECL/CML gate array
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High-speed divider using GaAs ECL/CML gate array
High-speed divider using GaAs ECL/CML gate array
PT
P.J. Topham
P.J. Topham
JP
J.G. Parton
J.G. Parton
MG
M.J. Golder
M.J. Golder
BH
B.H. Hollis
B.H. Hollis
NH
N.A. Hiams
N.A. Hiams
RG
R.C. Goodfellow
R.C. Goodfellow
MC
M.P. Cook
M.P. Cook
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30 March 1989
journal article
Published by
Institution of Engineering and Technology (IET)
in
Electronics Letters
Vol. 25
(7)
,
432-433
https://doi.org/10.1049/el:19890296
Abstract
An ECL/CML gate array using GaAs/AlGaAs heterojunction bipolar transistors is reported for the first time. The gate array has up to 12 programmable inputs and outputs. A divide-by-eight circuit configured on this array has been clocked at 3.1 GHz.
Keywords
PROGRAMMABLE INPUTS
DIVIDE-BY-EIGHT CIRCUIT
HETEROJUNCTION BIPOLAR TRANSISTORS
DIVIDERS
GAAS-ALGAAS
GATE ARRAY
COUNTING CIRCUITS ECL
CML
CLOCK FREQUENCY
SEMICONDUCTORS
HBT
3.1 GHZ
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