Design techniques for testable embedded error checkers

1 July 1990

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in Computer

Vol. 23 (7) , 84-88
https://doi.org/10.1109/2.56855

Abstract

Design techniques to ensure the testability of embedded checkers that cannot be tested by scan-path bistables are presented. The discussion covers: types of error detectors; parity checkers and self-testing circuits; two-rail checkers; M-out-of-N checkers; and equality checkers. The techniques outline guarantee single stuck fault testability.

Keywords

SYSTEM TESTING
DETECTORS
CIRCUIT TESTING
ERROR CORRECTION CODES
CIRCUIT FAULTS
COMPUTER ERRORS
FAULT DETECTION
SIGNAL DESIGN
DIGITAL SYSTEMS
SIGNAL DETECTION

This publication has 2 references indexed in Scilit:

Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs
IEEE Transactions on Computers, 1984
Design of a Self-Checking Microprogram Control
IEEE Transactions on Computers, 1973