Merged CMOS/bipolar technologies utilizing zone-melting-recrystallized SOI films

1 November 1984

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 5 (11) , 461-463
https://doi.org/10.1109/edl.1984.25988

Abstract

Two merged CMOS/bipolar technologies utilizing SOI structures have been demonstrated. In each case a single sequence of processing steps was used to fabricate fully isolated CMOS devices and vertical bipolar transistors on the same Si wafer. The CMOS devices were fabricated in zone-melting-recrystallized SOI film, while the bipolar devices were fabricated either in the SOI film or in epitaxial Si layers grown selectively on the Si substrate. Good electrical characteristics were obtained for the CMOS devices and for both SOI and epitaxial bipolar devices.

Keywords

CMOS TECHNOLOGY
SEMICONDUCTOR FILMS
BIPOLAR TRANSISTORS
CMOS PROCESS
ISOLATION TECHNOLOGY
SUBSTRATES
ETCHING
EPITAXIAL LAYERS
ION IMPLANTATION
CMOS DIGITAL INTEGRATED CIRCUITS

This publication has 0 references indexed in Scilit: