Fully integrated radio paging receiver

Abstract
A review is made of radio paging receiver requirements and a new receiver architecture is described which uses a direct conversion (zero-IF) principle. This circuit is shown to have advantages over the conventional superheterodyne with high-frequency IF and in particular is shown to be suitable for monolithic realisation. A single chip which performs as a complete high-sensitivity VHF receiver is presented, and the resulting miniature pager is shown.