New stacked capacitor structure using hemispherical-grain polycrystalline-silicon electrodes

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Abstract
A new technology which makes storage electrode surfaces uneven has been developed for realizing 64 Mbit dynamic random access memories (DRAMs). This technology utilizes a Si film which is deposited by low‐pressure chemical vapor deposition at 550 °C and has hemispherical grains (HSG). The surface area of the HSG‐Si film is about twice as large as Si films deposited at other temperatures. The specific temperature, 550 °C, corresponds to the transition temperature of the film structure from amorphous to polycrystalline. By applying the HSG‐Si film as the storage electrode of a stacked capacitor, a capacitance of twice the value is obtained. The increase of the capacitance makes it possible to reduce the DRAM cell area, even by using a relatively thick dielectric film, thereby providing higher reliability.

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