Time flow mechanisms for use in digital logic simulation
- 1 January 1971
- proceedings article
- Published by Association for Computing Machinery (ACM)
- p. 488-495
- https://doi.org/10.1145/800294.811476
Abstract
Implementation of a system for the simulation of the time domain operation of a deterministic digital logic net involves consideration of problems different from those encountered simulation of the time domain operation of a stochastic system. Examination of two different simulation time flow mechanisms illustrates how each technique may be applied to the simulation of logic nets. The design goals for a general purpose logic simulator are examined and the implementation techniques used in TEGAS2 are illustrated.Keywords
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