HAL: A High-Speed Logic Simulation Machine

1 October 1985

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Design & Test of Computers

Vol. 2 (5) , 61-73
https://doi.org/10.1109/MDT.1985.294819

Abstract

The architecture of a very-high-speed logic simulation machine (HAL), which can simulate up to one-half million gates and 2M-byte memory chips at a 5 ms clock speed, is described. This machine makes it possible to debug the total system-CPU, main memory, cache memory and control storage-before the actual machine is fabricated. HAL employs parallel and pipeline processing, and event-driven, block-level logic simulation. The prototype system for a 32-processor system has been constructed and is now in use as a tool for large mainframe computer development. HAL is more than a thousand times faster than existing software logic simulators.

Keywords

This publication has 11 references indexed in Scilit:

HAL: A High-Speed Logic Simulation Machine
IEEE Design & Test of Computers, 1985
A Survey of Hardware Accelerators Used in Computer-Aided Design
IEEE Design & Test of Computers, 1984
IBM'S Engineering Design System Support for VLSI Design and Verification
IEEE Design & Test of Computers, 1984
ULTIMATE: A Hardware Logic Simulation Engine
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1984
Design and implementation of a software simulation engine
Computer-Aided Design, 1983
HAL; A Block Level Hardware Logic Simulator
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1983
Special-Purpose Computer for Logic Simulation Using Distributed Processing
Bell System Technical Journal, 1982
The Yorktown Simulation Engine: Introduction
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1982
Software Support for the Yorktown Simulation Engine
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1982
A Logic Simulation Machine
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1982