Scalable VLSI parallel pipelined architecture for discrete wavelet transform

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Abstract
The discrete wavelet transform (DWT) provides a new method for signal/image analysis where high frequency components are studied with finer time resolution and low frequency components with coarser time resolution. It decomposes a signal or an image into localized contributions for multiscale analysis. This paper presents a parallel pipelined array processor for 1-dimensional (1-D) DWT. Unlike other VLSI DWT processors which processes signal data sequentially in a pipeline, this array processor can process all data in a signal segment in parallel and successive segments in the same pipeline which computes the multiple levels (octaves) of DWT. The speedup is linearly proportional to the width of the array (or the size of a segment), and thus the architecture is scalable.© (1993) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

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