A 600MS/s, 5-bit pipelined analog-to-digital converter for serial-link applications
- 26 October 2004
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
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- Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLLIEEE Journal of Solid-State Circuits, 2003
- A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOSIEEE Journal of Solid-State Circuits, 2001
- Analog-to-digital converter survey and analysisIEEE Journal on Selected Areas in Communications, 1999