A self-learning neural-network LSI using neuron MOSFETs
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 32, 84-85
- https://doi.org/10.1109/vlsit.1992.200660
Abstract
A functional MOS transistor called a neuron MOSFET (vMOS) which simulates the function of biological neurons is discussed. A method of constructing neural network LSIs that have a self-learning capability using the neuron MOSFET is given. The key is the implementation of a synaptic connection which changes its weight according to various learning algorithms. In addition, the synapse must be free from standby power dissipation and be as small as possible.<>Keywords
This publication has 1 reference indexed in Scilit:
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