A 10-bit, 20-MS/s, 35-mW pipeline A/D converter

Publisher Website

17 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/cicc.1994.379674

Abstract

No abstract available

This publication has 3 references indexed in Scilit:

A 10-b 20-Msample/s analog-to-digital converter
IEEE Journal of Solid-State Circuits, 1992
An experimental 1.5-V 64-Mb DRAM
IEEE Journal of Solid-State Circuits, 1991
A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS
IEEE Journal of Solid-State Circuits, 1991