High performance digitally programmable CNN chip with discrete templates
- 1 January 1994
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
In this paper a high performance VLSI implementation of a 3/spl times/3 Digitally Programmable Cellular Neural Network with discrete templates is presented. This chip, manufactured and successfully tested, gives an efficient solution to the hardware implementation of the Cellular Neural Networks. Moreover this chip can be connected to others to carry out very large CNN arrays. This implementation covers the 66% of the available one-neighborhood fixed templates for image processing applications.Keywords
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