DC analysis of multiple collector and multiple emitter transistors in integrated structures
- 1 February 1969
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 4 (1) , 20-24
- https://doi.org/10.1109/jssc.1969.1049949
Abstract
A generalized set of equations has been developed for the multiple collector and multiple emitter transistors. These equations are applicable to the lateral transistors, SCR's, and the T/SUP 2/L coupling transistors. The analysis shows how a nonuniform base layer (double-epitaxial structure) can increase the alpha of the lateral transistor and decrease the current drain to the substrate and decrease the current drain to the substrate. The analysis also shows that in a T/SUP 2/L gate the inverse alpha is nearly equal to the cross-coupling current ratio, and can be reduced by increasing the number of inputs.Keywords
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