A FASTBUS Interface for the 3081/E

1 January 1986

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science

Vol. 33 (1) , 793-796
https://doi.org/10.1109/TNS.1986.4337218

Abstract

The design of a FASTBUS interface to the 3081/E is presented. The interface consists of two boards, one specific to FASTBUS, the other usable by other interfaces to the 3081/E. The FASTBUS board is a dual-ported slave, permitting access from either of two cable segments. The general purpose board supports transfers to and from 3081/E memory and provides control of program execution. It also has several features which facilitate software debugging.

Keywords

FASTBUS
LOGIC
COMMUNICATION CABLES
DATA ACQUISITION
LINEAR ACCELERATORS
SOFTWARE DEBUGGING
COMPUTER AIDED INSTRUCTION
DATA PREPROCESSING
CONTROL SYSTEMS
ACCESS PROTOCOLS

This publication has 2 references indexed in Scilit:

The 3081/E Processor and Its on-Line Use
IEEE Transactions on Nuclear Science, 1985
Data Acquisition and FASTBUS for the Mark II Detector
IEEE Transactions on Nuclear Science, 1984