Compaction of ATPG-generated test sequences for sequential circuits
- 6 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- Test scheduling and control for VLSI built-in self-testIEEE Transactions on Computers, 1988
- An effective test generation system for sequential circuitsPublished by Association for Computing Machinery (ACM) ,1986
- SMART And FAST: Test Generation for VLSI Scan-Design CircuitsIEEE Design & Test of Computers, 1986
- The Complexity of Fault Detection Problems for Combinational Logic CircuitsIEEE Transactions on Computers, 1982
- Polynomially Complete Fault Detection ProblemsIEEE Transactions on Computers, 1975