Procedure placement using temporal ordering information
- 23 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Instruction cache performance is very important to instruction fetch efficiency and overall processor performance. The layout of an executable has a substantial effect on the cache miss rate during execution. This means that the performance of an executable can be improved significantly by applying a code-placement algorithm that minimizes instruction cache conflicts. We describe an algorithm for procedure placement, one type of code-placement algorithm, that significantly differs from previous approaches in the type of information used to drive the placement algorithm. In particular we gather temporal ordering information that summarizes the interleaving of procedures in a program trace. Our algorithm uses this information along with cache configuration and procedure size information to better estimate the conflict cost of a potential procedure ordering. We compare the performance of our algorithm with previously published procedure-placement algorithms and show noticeable improvements in the instruction cache behavior.Keywords
This publication has 8 references indexed in Scilit:
- Optimizing instruction cache performance for operating system intensive workloadsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Exploiting hardware performance counters with flow and context sensitive profilingPublished by Association for Computing Machinery (ACM) ,1997
- Efficient procedure mapping using cache line coloringACM SIGPLAN Notices, 1997
- Performance issues in correlated branch prediction schemesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1995
- ATOMPublished by Association for Computing Machinery (ACM) ,1994
- Profile guided code positioningPublished by Association for Computing Machinery (ACM) ,1990
- Program optimization for instruction cachesPublished by Association for Computing Machinery (ACM) ,1989
- Achieving high instruction cache performance with an optimizing compilerPublished by Association for Computing Machinery (ACM) ,1989