Automatic generation of simulation monitors from quantitative constraint formula [system-level verification]
- 22 December 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Constraints specification at higher levels of abstractionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2001
- Sequential synthesis using S1SIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000
- Synchronous data flowProceedings of the IEEE, 1987