Nitride-Masked Polishing (NMP) Technique for Surface Planarization of Interlayer-Dielectric Films

Abstract
A reflowed borophosphosilicate glass (BPSG) film having surface ridges is polished with a colloidal silica slurry, and the ridge width effect on the planarization rate or the efficiency is investigated. The planarization rate decreases drastically with increasing ridge width; thereby it is impossible to effectively remove the wide ridges corresponding to the stacked-type memory cell array areas in a dynamic random access memory (DRAM) device. Then, a nitride-masked polishing (NMP) technique is developed in which the BPSG surface except for the ridge areas, is covered with a Si3N4 film and the ridges are selectively polished away. A BPSG film on a DRAM with stacked-type capacitors is planarized by NMP to insure a tight focus margin for photolithography below deep submicron processes.

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