A monolithic digital chirp synthesizer chip with I and Q channels
- 9 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A monolithic digital chirp synthesizer (DCS) chip has been developed using GaAs-AlGaAs HI/sup 2/L technology. The 6500 HBT gate DCs chirp is capable of producing linear frequency-modulated (chirp) waveforms or single frequency waveforms. The major components of the DCS are two 28-bit pipelined accumulators, a 1.8 kbit sine ROM, a 1.8 kbit cosine ROM, and two 8-bit digital-to-analog converters (DACs). The total chip area is 4.877 mm*6.172 mm using a minimum feature size of 1.5 microns. All components of the DCS are functional and the device has been clocked at 450 MHz.<>Keywords
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