A 90ns 1Mb DRAM with multi-bit test mode

Publisher Website

1 January 1985

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 240-241
https://doi.org/10.1109/isscc.1985.1156837

Abstract

No abstract available

This publication has 2 references indexed in Scilit:

A 256K dynamic RAM with page-nibble mode
IEEE Journal of Solid-State Circuits, 1983
A high performance sense amplifier for a 5 V dynamic RAM
IEEE Journal of Solid-State Circuits, 1980