High current regimes in transistor collector regions
- 1 March 1973
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 20 (3) , 257-263
- https://doi.org/10.1109/T-ED.1973.17638
Abstract
The falloff of transistor gain and cutoff frequency at high currents is a familiar phenomenon. We show here, for the case of transistors having epitaxial collectors, how the mechanism responsible for the falloff depends upon device operating conditions. At any Vcb, a current can be calculated above which falloff begins. If the magnitude of Vcbis lower than a critical value Vcrit, falloff will occur because the transistor enters a saturation or quasi-saturation mode of operation. If the magnitude of Vcbis greater than Vcrit, falloff will occur because the transistor enters a mode of operation associated with space-charge-limited flow. We illustrate the usefulness of this description in understanding observed device behavior, and show how it enables a new interpretation to be given to experimental results previously reported. Important implications for transistor modeling are also discussed.Keywords
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