Electrical study of Schottky-barrier heights on atomically cleanp-type InP(110) surfaces

Publisher Website
Google Scholar
Abstract
We report here a systematic study of the electrical properties of a large number of metal (Ag, Cr, Cu, Au, Pd, Mn, Al, Ni) on p-type InP diodes. Schottky-barrier diodes were fabricated by in situ metal deposition on atomically clean InP(110) surfaces in ultrahigh vacuum. Schottky-barrier heights were determined from current-voltage (I-V) and capacitance-voltage (C-V) measurements. A small, but finite, range in barrier heights (0.76–0.98 eV) is found for the metal–p-type InP systems investigated. When a comparison is made to our earlier work on n-type surfaces, we find that the interface Fermi level of n-type and p-type samples pins at the same position within the band gap for each of the metal InP systems studied. Our experimental results indicate that models that use metal-independent surface states (energy and density) and potential normalization conditions (i.e., natural band lineups) can predict the general trends in the interface Fermi-level pinning behavior. They cannot, however, successfully predict the details of this behavior to within measurement error. A theoretical method to determine the natural band lineups at the interface (using a scheme developed by Anderson) is presented within this context. Also investigated was the effect of air exposure on the electrical characteristics of diodes. For in situ I-V measurements, the metal semiconductor systems were characterized by a near-unity (1.03–1.10) ideality factor n. Upon exposure to air, a large increase in the current and ideality factor n was found for several (Cu, Au, Pd, Mn, Ni) metal–p-type InP systems at all measured biases. A detailed investigation of the Pd–p-type InP system indicated that the ‘‘excess’’ current pathway which results from exposure to air is at the periphery and can be eliminated by mesa etching.